Paralleling and Driving Power MOSFETs in High-Power Applications
By Alvin Liu, Phoebus Chang, Peter Huang, Shaowei Cui, Bugao Wang, Chengyuan He
高功率应用中的并联和驱动功率 MOSFET 作者：阿尔文·刘，菲比斯·张，彼得·黄，邵伟·崔，卜高·王，程源·何

Nowadays, a single MOSFET is insufficient to sustain the entire system current because of the continuously growing requirement for high current and high-power applications. In this scenario, more MOSFETs in parallel operation are needed to deliver high current and power, which helps reduce the conduction losses and achieve low temperature rising for better system reliability.
如今，单个 MOSFET 不足以维持整个系统电流，因为对高电流和高功率应用的需求不断增长。在这种情况下，需要更多的 MOSFET 并联工作以提供高电流和功率，这有助于减少导通损耗并实现低温升，从而提高系统可靠性。
However, when two or more pieces of MOSFETs are in parallel, current sharing should be considered to balance the current through MOSFET during transient and steady-state conditions.
然而，当两个或多个 MOSFET 并联时，应考虑电流共享，以平衡 MOSFET 在瞬态和稳态条件下的电流。
Current sharing is related to two working scenarios: the conduction state, which means the MOSFET is fully turned on and its channel carries current with ${\mathrm{R}}_{\mathrm{DS}(\text{on})}$${\mathrm{R}}_{\mathrm{DS}(\text{ on })}$R_(DS(" on "))\mathrm{R}_{\mathrm{DS}(\text { on })}. The other is the dynamic state, meaning MOSFET turns on and off transition states. As known, ${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$R_(DS(on))\mathrm{R}_{\mathrm{DS(on)}} is a parameter with a positive thermal co-efficient, which could benefit the current balance in parallel applications. For example, if Q1 and Q2 work in parallel, Q1 has a lower RDS(on), and the lower RDS(on) results in higher conduction current and junction temperature than Q2. Because of the higher junction temperature of Q1, its ${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$R_(DS(on))\mathrm{R}_{\mathrm{DS}(\mathrm{on})} will be increased, which reduces conduction current to inherently realize the current balance due to its positive thermal co-efficient characters. So, the effect of ${\mathrm{R}}_{\mathrm{DS}(\text{on})}$${\mathrm{R}}_{\mathrm{DS}(\text{ on })}$R_(DS(" on "))\mathrm{R}_{\mathrm{DS}(\text { on })} on the current balance is not considered in this application note.
当前共享与两种工作场景相关：导通状态，意味着 MOSFET 完全开启，其通道携带电流与 ${\mathrm{R}}_{\mathrm{DS}(\text{on})}$${\mathrm{R}}_{\mathrm{DS}(\text{ on })}$R_(DS(" on "))\mathrm{R}_{\mathrm{DS}(\text { on })} 。另一个是动态状态，意味着 MOSFET 的开关过渡状态。如所知， ${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$R_(DS(on))\mathrm{R}_{\mathrm{DS(on)}} 是一个具有正热系数的参数，这可以在并联应用中有利于电流平衡。例如，如果 Q1 和 Q2 并联工作，Q1 的 RDS(on)较低，较低的 RDS(on)导致比 Q2 更高的导通电流和结温。由于 Q1 的结温较高，其 ${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$${\mathrm{R}}_{\mathrm{DS}(\mathrm{on})}$R_(DS(on))\mathrm{R}_{\mathrm{DS}(\mathrm{on})} 将增加，这减少了导通电流，从而由于其正热系数特性固有地实现电流平衡。因此，在本应用说明中不考虑 ${\mathrm{R}}_{\mathrm{DS}(\text{on})}$${\mathrm{R}}_{\mathrm{DS}(\text{ on })}$R_(DS(" on "))\mathrm{R}_{\mathrm{DS}(\text { on })} 对电流平衡的影响。
In this application note, the dynamic parameters that result in current imbalance, such as Vth and Ciss, are mainly focused on. In the end, the influence of driving and power loop parasitic inductance is also discussed. An optimum PCB layout is proposed for design reference.
在本应用说明中，主要关注导致电流不平衡的动态参数，如 Vth 和 Ciss。最后，还讨论了驱动和电源回路寄生电感的影响。提出了一种最佳 PCB 布局供设计参考。

Paralleling MOSFETs is a common solution to target high-current applications, such as motor drive applications illustrated in Figure 1. In this application, SPWM and SVPWM are the popular control modulation methods with sinusoidal output current. During normal operation, the MOSFETs of the high side and low side are configured as half-bridge working in hard or soft switching states due to different working sectors. The current balance performance of each MOSFET is the key consideration for high system reliability, especially in phase short and lock rotor test. In these critical tests, significant highphase current flows to the MOSFET. One MOSFET may sustain most of the total current, which increases the risk of being damaged if the current is imbalanced.
并联 MOSFET 是针对高电流应用（如图 1 所示的电机驱动应用）的常见解决方案。在此应用中，SPWM 和 SVPWM 是具有正弦输出电流的流行控制调制方法。在正常操作中，高侧和低侧的 MOSFET 被配置为半桥，在不同的工作区间下工作于硬开关或软开关状态。每个 MOSFET 的电流平衡性能是高系统可靠性的关键考虑因素，特别是在相短路和锁定转子测试中。在这些关键测试中，显著的高相电流流入 MOSFET。一个 MOSFET 可能承受大部分总电流，如果电流不平衡，增加了损坏的风险。

Figure 1. High Current Motor Drive Application for E-scooter
图 1. 电动滑板车的高电流电机驱动应用

Regarding parallel application, many factors influence the current balance during MOSFET switching on and off transient states. If Q1 and Q2 are two parts in parallel, for example, and the speed of Q1 turn on and turn off is faster than that of Q2, as shown in Figure 2, the current imbalance between Q1 and Q2 could be caused. In this scenario, the difference in MOSFET switching speed is caused by MOSFET intrinsic characteristics, such as the different Vth, Ciss and internal Rg.
关于并联应用，许多因素影响 MOSFET 开关瞬态状态下的电流平衡。例如，如果 Q1 和 Q2 是并联的两个部分，并且 Q1 的开启和关闭速度快于 Q2，如图 2 所示，可能会导致 Q1 和 Q2 之间的电流不平衡。在这种情况下，MOSFET 开关速度的差异是由 MOSFET 的内在特性引起的，例如不同的 Vth、Ciss 和内部 Rg。

When the value of Vth of MOSFETs in parallel is different, it will cause MOSFET to turn on and off asynchronously. When internal Rg or Ciss differs, it will lead to different Vgs ramp slew rates. In this application note, MOSFET intrinsic parameters and external driving parameters will be discussed to figure out the key factors to the current balance, which could help optimize the power system and application design.
当并联的 MOSFET 的 Vth 值不同时，会导致 MOSFET 异步开关。当内部 Rg 或 Ciss 不同时，会导致不同的 Vgs 上升斜率。在本应用说明中，将讨论 MOSFET 的内在参数和外部驱动参数，以找出影响电流平衡的关键因素，这将有助于优化电源系统和应用设计。

Figure 2. Current Imbalance Scenarios, Turn-on (left), Turn-off (right)
图 2. 当前不平衡场景，开启（左），关闭（右）

Vth variation is common in many MOSFET products, especially in different lots. The experimental verification on the devices with different Vth is done while other parameters such as Rg, Ciss, and Gfs are kept the same. To facilitate the study of the current sharing characteristics of MOSFETs in parallel, a simplification is made to study the current sharing characteristics with 2-MOSFETs, 3-MOSFETs, and 5-MOSFETs in parallel. The DUT is AOTL66912, BVDSS 100V, RDS(on) 1.4m $\mathrm{\Omega }$$\mathrm{\Omega }$Omega\Omega in a typical TOLL Package.
Vth 变化在许多 MOSFET 产品中很常见，尤其是在不同批次中。对具有不同 Vth 的器件进行实验验证，同时保持其他参数如 Rg、Ciss 和 Gfs 相同。为了便于研究并联 MOSFET 的电流共享特性，简化研究了 2 个 MOSFET、3 个 MOSFET 和 5 个 MOSFET 并联的电流共享特性。被测设备是 AOTL66912，BVDSS 100V，RDS(on) 1.4m $\mathrm{\Omega }$$\mathrm{\Omega }$Omega\Omega ，采用典型的 TOLL 封装。

The schematic of two MOSFETs in parallel for testing with different Vth is shown in Figure 3. The DUTs of Q1 and Q2 are marked in red. The external Rg of every MOSFET is configured as different values of turn on and off, which is used to adjust the switching speed.
图 3 显示了两个并联的 MOSFET 的原理图，用于测试不同的 Vth。Q1 和 Q2 的被测设备（DUT）用红色标记。每个 MOSFET 的外部 Rg 配置为不同的开关值，用于调整开关速度。

Figure 3. Two MOSFETs Parallel Test Circuit and Board Overview
图 3. 两个 MOSFET 并联测试电路和电路板概述

At 2pcs MOSFETs parallel condition, two devices of Q1 and Q2 have the same parameters, including Vth. The turn on and turn off time will be synchronous and thus have the same Eon and Eoff of each MOSFET, shown in Figure 4.
在两个 MOSFET 并联的情况下，Q1 和 Q2 两个设备具有相同的参数，包括 Vth。开启和关闭时间将是同步的，因此每个 MOSFET 的 Eon 和 Eoff 相同，如图 4 所示。

Figure 4. Two MOSFETs ( $\mathrm{\Delta }\mathrm{Vth}=0$$\mathrm{\Delta }\mathrm{Vth}=0$DeltaVth=0\Delta \mathrm{Vth}=0 ) Parallel Switching Waveform
图 4. 两个 MOSFET（ $\mathrm{\Delta }\mathrm{Vth}=0$$\mathrm{\Delta }\mathrm{Vth}=0$DeltaVth=0\Delta \mathrm{Vth}=0 ）并联开关波形
However, if the values of Vth of two paralleled MOSFETs do not match, the device with lower Vth will turn on earlier, carrying a larger current at the transient turn-on and resulting in a significant loss, as shown in Figure 5 . As well as at the transient state of turn-off, the device with lower Vth will go through a delayed turn-off time. At this point, the current will be converted to the lower Vth device. Therefore, it will exhibit a large peak current, which will cause significant power losses. This phenomenon will become more severe at higher Vth variation or many more pieces of MOSFETs in parallel.
然而，如果两个并联 MOSFET 的 Vth 值不匹配，Vth 较低的器件将更早开启，在瞬态开启时承载更大的电流，从而导致显著的损耗，如图 5 所示。在瞬态关断状态下，Vth 较低的器件将经历延迟的关断时间。此时，电流将转移到 Vth 较低的器件。因此，它将表现出较大的峰值电流，这将导致显著的功率损耗。随着 Vth 变化的加剧或更多的 MOSFET 并联，这种现象将变得更加严重。

Figure 5. Two MOSFETs ( $\mathrm{\Delta }\mathrm{Vth}=\mathbf{0}\mathbf{.}\mathbf{4}\mathbf{V}$$\mathrm{\Delta }\mathrm{Vth}=\mathbf{0}\mathbf{.}\mathbf{4}\mathbf{V}$DeltaVth=0.4V\Delta \mathrm{Vth}=\mathbf{0 . 4 V} ) Parallel Switching Waveform
图 5. 两个 MOSFET（ $\mathrm{\Delta }\mathrm{Vth}=\mathbf{0}\mathbf{.}\mathbf{4}\mathbf{V}$$\mathrm{\Delta }\mathrm{Vth}=\mathbf{0}\mathbf{.}\mathbf{4}\mathbf{V}$DeltaVth=0.4V\Delta \mathrm{Vth}=\mathbf{0 . 4 V} ）并联开关波形
When Q1 and Q2 have the same parameters, such as internal Vth, Rg, and Ciss, their Eon and Eoff are very similar. The gap of power loss is only 0.01 W . When Q2 is replaced by the device with lower Vth, it has significantly higher Eon and Eoff. Its power loss is 1.87 W higher than that of the device Q1 with higher Vth, as shown in Table 1.
当 Q1 和 Q2 具有相同的参数，例如内部 Vth、Rg 和 Ciss 时，它们的 Eon 和 Eoff 非常相似。功率损耗的差距仅为 0.01 W。当用 Vth 较低的器件替换 Q2 时，其 Eon 和 Eoff 显著提高。其功率损耗比 Vth 较高的器件 Q1 高出 1.87 W，如表 1 所示。

Table 1. Two MOSFETs Parallel Test Result (Ton=250ns, Toff=100ns, Fs=10KHz)
表 1. 两个 MOSFET 并联测试结果（Ton=250ns，Toff=100ns，Fs=10KHz）

The speed of MOSFET turn on and turn off is another factor that impacts the current balance. A longer Ton and Toff, along with a higher resistance value of external driving Rg, are executed in the test, and the gap of power loss between different Vth parts will become larger, as shown in Table 2. When the period of turn-off is 100ns, the gap of total power loss, including switching and conduction loss, between Q2 with lower Vth and Q1 is about 1.87 W . When the time of turn off is 300 ns , the
MOSFET 开启和关闭的速度是影响电流平衡的另一个因素。在测试中，执行了更长的 Ton 和 Toff，以及更高的外部驱动 Rg 的电阻值，不同 Vth 部分之间的功率损失差距将变得更大，如表 2 所示。当关断周期为 100ns 时，具有较低 Vth 的 Q2 与 Q1 之间的总功率损失差距（包括开关损失和导通损失）约为 1.87 W。当关断时间为 300 ns 时，